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<section-title-en>2.5 Address Translation</section-title-en>
<section-title-ch>2.5 地址转换</section-title-ch>
<p-en>
	System software relies on the CPU's address translation mechanism for implementing isolation among less privileged pieces of software (applications or operating systems). Virtually all secure architecture designs bring changes to address translation. We summarize the Intel architecture's address translation features that are most relevant when establishing a system's security properties, and refer the reader to [108] for a more general presentation of address translation concepts and its other uses.
</p-en>
<p-ch>
	系统软件依靠CPU的地址转换机制来实现权限较低的软件（应用程序或操作系统）之间的隔离。实际上，所有的安全架构设计都会给地址转换带来变化。我们总结了英特尔架构在建立系统的安全属性时最相关的地址翻译功能，并向读者推荐[108]，以便更概括地介绍地址翻译概念及其其他用途。
</p-ch>
<section-title-en>2.5.1 Address Translation Concepts</section-title-en>
<section-title-ch>2.5.1 地址转换概念</section-title-ch>
<p-en>
	From a systems perspective, address translation is a layer of indirection (shown in Figure 10) between the virtual addresses, which are used by a program's memory load and store instructions, and the physical addresses, which reference the physical address space (§2.4). The mapping between virtual and physical addresses is defined by page tables, which are managed by the system software.
</p-en>
<p-ch>
	从系统的角度来看，地址转换是程序的内存加载和内存指令所使用的虚拟地址与引用物理地址空间的物理地址之间的一层间接关系（如图10所示）（§2.4）。虚拟地址和物理地址之间的映射由页表定义，页表由系统软件管理。
</p-ch>
<img src="fig.10.jpg" />
<p-en>Figure 10: Virtual addresses used by software are translated into physical memory addresses using a mapping defined by the page tables.</p-en>
<p-ch>图10：软件使用的虚拟地址使用页表定义的映射翻译成物理内存地址。</p-ch>
<p-en>
	Operating systems use address translation to implement the virtual memory abstraction, illustrated by Figure 11. The virtual memory abstraction exposes the same interface as the memory abstraction in §2.2, but each process uses a separate virtual address space that only references the memory allocated to that process. From an application developer standpoint, virtual memory can be modeled by pretending that each process runs on a separate computer and has its own DRAM.
</p-en>
<p-ch>
	操作系统使用地址转换来实现虚拟内存抽象，如图11所示。虚拟内存抽象暴露了与§2.2中的内存抽象相同的接口，但每个进程都使用一个单独的虚拟地址空间，只引用分配给该进程的内存。从应用开发者的角度来看，虚拟内存可以通过假装每个进程运行在单独的计算机上并拥有自己的DRAM来建模。
</p-ch>
<img src="fig.11.jpg" />
<p-en>Figure 11: The virtual memory abstraction gives each process its own virtual address space. The operating system multiplexes the computer's DRAM between the processes, while application developers build software as if it owns the entire computer's memory.</p-en>
<p-ch>图11：虚拟内存抽象给每个进程提供了自己的虚拟地址空间。操作系统在进程之间复用计算机的DRAM，而应用程序开发人员则像拥有整个计算机的内存一样构建软件。</p-ch>
<p-en>
	Address translation is used by the operating system to multiplex DRAM among multiple application processes, isolate the processes from each other, and prevent application code from accessing memory-mapped devices directly. The latter two protection measures prevent an application's bugs from impacting other applications or the OS kernel itself. Hypervisors also use address translation, to divide the DRAM among operating systems that run concurrently, and to virtualize memory-mapped devices.
</p-en>
<p-ch>
	地址转换被操作系统用来在多个应用进程之间多路复用DRAM，使进程之间相互隔离，防止应用程序代码直接访问内存映射的设备。后两种保护措施可以防止应用程序的错误影响到其他应用程序或操作系统内核本身。管理程序还使用地址转换，在并发运行的操作系统之间划分DRAM，并对内存映射设备进行虚拟化。
</p-ch>
<p-en>
	The address translation mode used by 64-bit operating systems, called IA-32e by Intel's documentation, maps 48-bit virtual addresses to physical addresses of at most 52 bits2. The translation process, illustrated in Figure 12, is carried out by dedicated hardware in the CPU, which is referred to as the address translation unit or the memory management unit (MMU).
</p-en>
<p-ch>
	64位操作系统使用的地址转换模式，英特尔的文档称之为IA-32e，它将48位的虚拟地址映射到最多52位的物理地址2。图12所示的翻译过程是由CPU中的专用硬件来完成的，它被称为地址翻译单元或内存管理单元（MMU）。
</p-ch>
<img src="fig.12.jpg" />
<p-en>Figure 12: IA-32e address translation takes in a 48-bit virtual address and outputs a 52-bit physical address.</p-en>
<p-ch>图12：IA-32e地址转换接收48位虚拟地址并输出52位物理地址。</p-ch>

<p-en>
	The bottom 12 bits of a virtual address are not changed by the translation. The top 36 bits are grouped into four 9-bit indexes, which are used to index into the page tables. Despite its name, the page tables data structure closely resembles a full 512-ary search tree where nodes have fixed keys. Each node is represented in DRAM as an array of 512 8-byte entries that contain the physical addresses of the next-level children as well as some flags. The physical address of the root node is stored in the CR3 register. The arrays in the last-level nodes contain the physical addresses that are the result of the address translation.
</p-en>
<p-ch>
	虚拟地址的底部12位不会因为翻译而改变。前36位被归为4个9位索引，用于索引到页表中。尽管名字叫表，但页表的数据结构很像一个完整的512ary搜索树，其中节点有固定的键。每个节点在DRAM中表示为一个512个8字节的条目数组，其中包含下一级子节点的物理地址以及一些标志。根节点的物理地址存储在CR3寄存器中。最后一级节点中的数组包含地址转换的结果的物理地址。
</p-ch>
<p-en>
	The address translation function, which does not change the bottom bits of addresses, partitions the memory address space into pages. A page is the set of all memory locations that only differ in the bottom bits which are not impacted by address translation, so all the memory addresses in a virtual page translate to corresponding addresses in the same physical page. From this perspective, the address translation function can be seen as a mapping between Virtual Page Numbers (VPN) and Physical Page Numbers (PPN), as shown in Figure 13.
</p-en>
<p-ch>
	地址翻译功能，不改变地址的底位，将内存地址空间分割成页。页是所有内存位置的集合，只有底位不同，不受地址翻译的影响，所以虚拟页中的所有内存地址都能翻译成同一物理页中的相应地址。从这个角度看，地址翻译功能可以看作是虚拟页号（VPN）和物理页号（PPN）之间的映射，如图13所示。
</p-ch>
<img src="fig.13.jpg" />
<p-en>Figure 13: Address translation can be seen as a mapping between virtual page numbers and physical page numbers.</p-en>
<p-ch>图13：地址转换可以看作是虚拟页码和物理页码之间的映射。</p-ch>

<p-en>
	In addition to isolating application processes, operating systems also use the address translation feature to run applications whose collective memory demands exceed the amount of DRAM installed in the computer. The OS evicts infrequently used memory pages from DRAM to a larger (but slower) memory, such as a hard disk drive (HDD) or solid-state drive (SSD). For historical reason, this slower memory is referred to as the disk.
</p-en>
<p-ch>
	除了隔离应用程序进程外，操作系统还使用地址转换功能来运行那些集体内存需求超过计算机中安装的DRAM数量的应用程序。操作系统将不经常使用的内存页从DRAM中驱逐到一个更大的（但速度更慢的）记忆体中，如硬盘驱动器（HDD）或固态驱动器（SSD）。由于历史原因，这种较慢的记忆体被称为磁盘。
</p-ch>
<p-en>
	The OS ability to over-commit DRAM is often called page swapping, for the following reason. When an application process attempts to access a page that has been evicted, the OS “steps in” and reads the missing page back into DRAM. In order to do this, the OS might have to evict a different page from DRAM, effectively swapping the contents of a DRAM page with a disk page. The details behind this high-level description are covered in the following sections.
</p-en>
<p-ch>
	操作系统超额提交DRAM的能力通常被称为页面交换，原因如下。当一个应用程序进程试图访问一个被驱逐的页面时，操作系统会 "介入 "并将缺失的页面读回DRAM中。为了做到这一点，操作系统可能必须从DRAM中驱逐一个不同的页面，有效地将DRAM页面的内容与磁盘页面交换。这个高级描述背后的细节将在下面的章节中介绍。
</p-ch>
<p-en>
	The CPU's address translation is also referred to as “paging”, which is a shorthand for “page swapping”.
</p-en>
<p-ch>
	CPU的地址转换也称为 "分页"，是 "页面交换 "的简称。
</p-ch>
<section-title-en>2.5.2 Address Translation and Virtualization</section-title-en>
<section-title-ch>2.5.2 地址转换与虚拟化</section-title-ch>
<p-en>
	Computers that take advantage of hardware virtualization use a hypervisor to run multiple operating systems at the same time. This creates some tension, because each operating system was written under the assumption that it owns the entire computer's DRAM. The tension is solved by a second layer of address translation, illustrated in Figure 14.
</p-en>
<p-ch>
	利用硬件虚拟化的计算机使用管理程序来同时运行多个操作系统。这就造成了一些紧张，因为每个操作系统都是在它拥有整个计算机的DRAM的假设下编写的。这种紧张关系通过第二层地址转换来解决，如图14所示。
</p-ch>
<img src="fig.14.jpg" />
<p-en>Figure 14: Virtual addresses used by software are translated into physical memory addresses using a mapping defined by the page tables.</p-en>
<p-ch>图14：软件使用的虚拟地址使用页表定义的映射翻译成物理内存地址。</p-ch>
<p-en>
	When a hypervisor is active, the page tables set up by an operating system map between virtual addresses and guest-physical addresses in a guest-physical address space. The hypervisor multiplexes the computer's DRAM between the operating systems' guest-physical address spaces via the second layer of address translations, which uses extended page tables (EPT) to map guest-physical addresses to physical addresses.
</p-en>
<p-ch>
	当管理程序处于活动状态时，操作系统设置的页表在虚拟地址和客-物理地址之间进行映射，在客-物理地址空间中。管理程序通过地址转换的第二层将计算机的DRAM在操作系统的客体物理地址空间之间进行复用，使用扩展页表（EPT）将客体物理地址映射到物理地址。
</p-ch>
<p-en>
	The EPT uses the same data structure as the page tables, so the process of translating guest-physical addresses to physical addresses follows the same steps as IA-32e address translation. The main difference is that the physical address of the data structure's root node is stored in the extended page table pointer (EPTP) field in the Virtual Machine Control Structure (VMCS) for the guest OS. Figure 15 illustrates the address translation process in the presence of hardware virtualization.
</p-en>
<p-ch>
	EPT使用与页表相同的数据结构，因此，将客人物理地址翻译成物理地址的过程与IA-32e地址翻译的步骤相同。主要的区别是，数据结构的根节点的物理地址存储在客体操作系统的虚拟机控制结构（VMCS）中的扩展页表指针（EPTP）字段中。图15说明了在硬件虚拟化情况下的地址转换过程。
</p-ch>
<img src="fig.15.jpg" />
<p-en>Figure 15: Address translation when hardware virtualization is enabled. The kernel-managed page tables contain guest-physical addresses, so each level in the kernel's page table requires a full walk of the hypervisor's extended page table (EPT). A translation requires up to 20 memory accesses (the bold boxes), assuming the physical address of the kernel's PML4 is cached.</p-en>
<p-ch>图15：启用硬件虚拟化时的地址转换。内核管理的页表包含客体物理地址，因此内核页表中的每一级都需要完整地走一遍hypervisor的扩展页表（EPT）。假设内核的PML4的物理地址被缓存，一次翻译最多需要20次内存访问（粗框）。</p-ch>
<section-title-en>2.5.3 Page Table Attributes</section-title-en>
<section-title-ch>2.5.3 页表属性</section-title-ch>
<p-en>
	Each page table entry contains a physical address, as shown in Figure 12, and some Boolean values that are referred to as flags or attributes. The following attributes are used to implement page swapping and software isolation.
</p-en>
<p-ch>
	每个页表条目都包含一个物理地址，如图12所示，以及一些布尔值，这些布尔值被称为标志或属性。以下属性用于实现页面交换和软件隔离。
</p-ch>
<p-en>
	The present (P) flag is set to 0 to indicate unused parts of the address space, which do not have physical memory associated with them. The system software also sets the P flag to 0 for pages that are evicted from DRAM. When the address translation unit encounters a zero P flag, it aborts the translation process and issues a hardware exception, as described in §2.8.2. This hardware exception gives system software an opportunity to step in and bring an evicted page back into DRAM.
</p-en>
<p-ch>
	存在(P)标志设置为0，表示地址空间中未使用的部分，这些部分没有与物理内存相关联。系统软件还将P标志设置为0，用于表示从DRAM中驱逐的页面。当地址翻译单元遇到P标志为0时，它将中止翻译过程，并发出一个硬件异常，如§2.8.2所述。这个硬件异常给系统软件提供了一个介入的机会，使被驱逐的页面回到DRAM中。
</p-ch>
<p-en>
	The accessed (A) flag is set to 1 by the CPU whenever the address translation machinery reads a page table entry, and the dirty (D) flag is set to 1 by the CPU when an entry is accessed by a memory write operation. The A and D flags give the hypervisor and kernel insight into application memory access patterns and inform the algorithms that select the pages that get evicted from RAM.
</p-en>
<p-ch>
	每当地址转换机械读取一个页表条目时，accessed (A)标志被CPU设置为1，当一个条目被内存写操作访问时，dirty (D)标志被CPU设置为1。A和D标志使管理程序和内核深入了解应用程序的内存访问模式，并为选择从RAM中驱逐的页面的算法提供信息。
</p-ch>
<p-en>
	The main attributes supporting software isolation are the writable (W) flag, which can be set to 0 to prohibit writes to any memory location inside a page, the disable execution (XD) flag, which can be set to 1 to prevent instruction fetches from a page, and the supervisor (S) flag, which can be set to 1 to prohibit any accesses from application software running at ring 3.
</p-en>
<p-ch>
	支持软件隔离的主要属性是可写(W)标志，可设置为0，以禁止对页内任何内存位置的写入；可禁用执行(XD)标志，可设置为1，以防止从页中获取指令；主管(S)标志，可设置为1，以禁止运行在3环的应用软件的任何访问。
</p-ch>

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